1. Field of the Invention
The present invention relates to a liquid crystal display system and a method for driving the same, and more particularly, to a liquid crystal display system capable of improving display quality using a power line and a coupling capacitor and a method for driving the same.
2. Description of the Prior Art
Liquid crystal displays (LCDs) are flat displays characterized in thin appearance and low power consumption and have been widely used in various products, including personal digital assistants (PDAs), mobile phones, notebook/desktop computers, and communication terminals.
Reference is made to FIG. 1, which schematically depicts a prior art thin film transistor (TFT) LCD 10. The TFT LCD 10 includes a source driving circuit 12, a gate driving circuit 14, a plurality of data lines, gate lines Gate1-Gatem, demultiplexers DUX1-DUXn, and a plurality of pixel units. The data lines of the TFT LCD 10 includes red data lines R1-Rn, green data lines G1-Gn and blue data lines B1-Bn. The pixel units of the TFT LCD 10 includes red pixel units PR1-PRn, green pixel units PG1-PGn, and blue pixel units PB1-PBn. The demultiplexers DUX1-DUXn include control switches SWR1, SWG1, SWB1 to SWRn, SWGn, SWBn, respectively. Each pixel unit, comprising a driving TFT switch and a capacitor, controls light according to charges stored in the capacitor. The gate driving circuit 14 generates scan signals for turning on/off the driving TFT switches of the pixel units via corresponding gate lines. The source driving circuit 12 generates data signals corresponding to images to be displayed by each pixel unit and sends the data signals to the pixels units via the control switches of corresponding demultiplexers. The TFT LCD 10 has a 1-to-3 demultiplexer structure, in which each demultiplexer distributes the data signals to three data lines. By respectively sending control signals CKH1, CKH2 and CKH3 to the control switches SWR1-SWRn, SWG1-SWGN, and SWB1-SWBn, data signals can be written into the pixel units via corresponding demulitiplexers in a predetermined sequence.
Reference is made to FIG. 2, which is a timing diagram illustrating a prior art row-inversion method for driving the TFT LCD 10. In FIG. 2, VGATE+ and VGATE− represent the gate signals sent to a gate line during the positive- and negative-polarity driving periods, respectively. CKH1-CKH3 represent the control signals sequentially applied to the control switches. VCOM represents the common voltage of the TFT LCD 10. VPIXEL+(R), VPIXEL+(G) and VPIXEL+(B) respectively represent the voltage levels of the pixel units coupled to the red, green and blue data lines during the positive-polarity driving periods, which are respectively illustrated by dash lines, bold dash lines and dash-dot lines in FIG. 2. VPIXEL−(R), VPIXEL−(G) and VPIXEL−(B) respectively represent the voltage levels of the pixel units coupled to the red, green and blue data lines during the negative-polarity driving periods, which are respectively illustrated by dash lines, bold dash lines and dash-dot lines in FIG. 2 as well.
As can be seen in FIG. 2, data are written into the pixel units in an R-G-B sequence by sequentially applying the control signals CKH1-CKH3 for electrically connecting the source driving circuit 12 to corresponding red, green, or blue data lines. During the positive-polarity driving periods in the prior art row-inversion method, when the gate signal VGATE+ applied to a gate line has a high voltage level, the TFT driving switches in the pixel units coupled to the gate line are turned on so that the capacitors in the pixel units coupled to the gate line can be electrically connected to corresponding data lines. Next, when the control signals CKH1-CKH3 have high voltage levels, the control switches respectively corresponding to the red, green and blue data lines in each demultiplexer are sequentially turned on. Therefore, the data signals generated by the source driving circuit 12 can be written into the pixel units coupled to the data lines via corresponding turned-on control switches, thereby changing the voltage levels of the red, green and blue pixel units accordingly.
Since inherent capacitance exists between the data lines, the voltage level of a data line is affected when the voltage level of an adjacent data line varies. Assuming the demultiplexer DUX2 in FIG. 2 is used for illustration, VGATE+ and VGATE− respectively represent the gate signals sent to the gate line Gate2 during the positive and negative-polarity driving periods. VPIXEL+(R), VPIXEL+(G) and VPIXEL+(B) respectively represent the voltage levels of the pixel units PR2, PG2, PB2 during the positive-polarity driving periods, while VPIXEL−(R), VPIXEL−(G) and VPIXEL−(B) respectively represent the voltage levels of the pixel units PR2, PG2, PB2 during the negative-polarity driving periods.
During the positive-polarity driving periods when the data signal generated by the source driving circuit 12 is transmitted to the red data line R2 via the demultiplexer DUX2, the voltage VPIXEL+(R) goes high accordingly (at T1 in FIG. 2). Also, coupling voltages ΔVGR and ΔVBR due to the inherent capacitance between the data lines are generated when the data signals are transmitted to the green data line G2 and the blue data line B1 both adjacent to the red data line R2, causing the voltage VPIXEL+(R) to increase further (at T2 and T3 in FIG. 2). When the data signal generated by the source driving circuit 12 is transmitted to the green data line G2 via the demultiplexer DUX2, the voltage VPIXEL+(G) goes high accordingly (at T2 in FIG. 2). Also, a coupling voltage ΔVBG due to the inherent capacitance between the data lines is generated when the data signal is transmitted to the blue data line B2 adjacent to the green data line G2, causing the voltage VPIXEL+(G) to increase further (at T3 in FIG. 2). When the data signal generated by the source driving circuit 12 is transmitted to the blue data line B2 via the demultiplexer DUX2, the voltage VPIXEL+(B) goes high accordingly (at T3 in FIG. 2). When the TFT switches in the pixel units are turned off at Tfirst in FIG. 2, liquid crystal voltages VLC+(R), VLC+(G), and VLC+(B) respectively represent the differences between the common voltage and the voltage levels of the red, green and blue pixel units during the positive-polarity driving periods. Similarly, when the TFT switches in the pixel units are turned off at Tsecond in FIG. 2, liquid crystal voltages VLC−(R), VLC−(G), and VLC−(B) respectively represent the differences between the common voltage and the voltage levels of the red, green and blue pixel units during the negative-polarity driving periods.
Regardless of the positive- or negative-polarity driving periods, the illumination of a pixel unit is related to the absolute value of its liquid crystal voltage VLC. In the positive-polarity driving periods after the TFT switches in the pixel units are turned off at Tfirst in FIG. 2, the liquid crystal voltages corresponding to the red, blue and green pixel units have the following relationship: VLC+(R)>VLC+(G)> and VLC+(B). Similarly, in the negative-polarity driving periods after the TFT switches in the pixel units are turned off at Tsecond in FIG. 2, the liquid crystal voltages corresponding to the red, blue and green pixel units have the following relationship: |VLC−(R)|>|VLC−(G)|>|VLC−(B)|. Therefore, when driving the TFT LCD 10 using the prior art driving method and displaying images of the same grayscale, the mismatches in the absolute values of the liquid crystal voltages and light transmittance will result in various degrees of color shifting, which largely affects the display quality of the TFT LCD 10.